IBM reveals the first sub-1 nanometer chip technology

IBM reveals the first sub-1 nanometer chip technology

IBM, a technology powerhouse based in the US, unveiled what it termed as the first sub-1 nanometer (nm) chip technology in the world, which represents a huge step forward for the semiconductor industry as it reaches the physical boundaries of conventional chip scaling.

The business claims that the new chip uses a nanostack, a unique three-dimensional transistor architecture, and is constructed on a 0. 7 nm, or 7-angstrom, process node.

According to the statement, the chip allows for ongoing advancements in performance and energy efficiency at atomic-scale proportions.

With nearly 100 billion transistors crammed onto a gadget about the size of a fingernail, it practically doubles the transistor density of its 2 nm chip. technology first introduced in 2021.

The firm stated that the new technology is expected to provide up to 50% higher performance or 70% higher energy efficiency than its 2 nm node processors.

It is anticipated that the technology would facilitate demanding applications such as generative AI, cloud infrastructure, and electronic devices of the next generation.

Jay Gambetta, Director of IBM Research and an IBM Fellow, stated that the company’s recent chip breakthrough represents a pivotal point in computing, advancing technology beyond the nanometer age to the atomic scale.

The nanostack architecture, according to the company, vertically stacks and staggers transistors, allowing more components to be packed onto a chip while allowing different materials to be optimised independently for performance and power efficiency.

In the interim, IBM experts demonstrated the architecture’s ability to considerably improve SRAM scaling, allowing chip designers to create more powerful processors that can manage high-bandwidth AI workloads.

Within the next five years, the firm stated that the technology will be commercially adopted for the first time.

Moreover, in collaboration with industry partners like ASML, Lam Research, Tokyo Electron, and SCREEN Semiconductor Solutions, the study was carried out at IBM’s semiconductor research facility in Albany, New York.

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